In order to function, electronic components, circuits and systems require electrical power. This power is taken from a power source (AC mains, battery, solar panel), conditioned by a power converter, and delivered to a load. Power converters can be implemented in either a linear fashion, or in switch-mode technology. Switch-mode power converters (SMPCs) are becoming increasingly popular because of their inherently high power conversion efficiency. SMPCs are most fundamental components in electronic systems, and commonly determine their ergonomics as well as overall usefulness. The present application is directed to SMPC's which convert a DC voltage to a DC voltage and are referred to generically as DC-DC converters.
In many applications, such as processors and other complex digital circuits, DC-DC converters need to supply large currents. For a number of reasons (e.g. availability of power handling components, component dimensions, reliability and transient performance) it is common practice to provide the power to the circuit from a plurality of switch mode circuits having their outputs connected in parallel to provide power to a common load. Each switching circuit is said to supply a phase. The phases may be provided with a common controller or individual controllers or indeed a combination of the two. In any event, it will be appreciated that the output phases are in parallel such that the phases feed a common load, and each of the phases contributes to the overall output current supplied to the load circuitry. The most typical implementation is that of a multi-phase buck converter, although other arrangements and topologies are also known. Each of the phases typically consists of active switches and an inductor.
It is important that the individual phases share the work of supplying current to the load so as average out component stresses, and thereby maximize system reliability.
Thus in a typical arrangement, one of the design goals is that each of the SMPC phases contributes a defined ratio of the total output current. Most typically, SMPC designers attempt to have the SMPC phases to contribute the same amount of output current (“current sharing”). A number of techniques are available in order to achieve a degree of current sharing, including both passive current sharing, and active current sharing. Passive current sharing relies on matching of drive signals and power handling components, and achieves current share imbalances of around 10%. Active current share schemes actively measure phase currents, and actively adapt the drive signals such that current share imbalances are minimized. Imbalances of 3% or less are achievable. It is also known to include safety features to switch off individual phases where operating conditions exceed their safe window of operation, for example in the event of overheating or component failure.
The present application seeks to improve upon the reliability of these arrangements.